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Characterization of Layer Stacks in Microelectronic Products: Challenges to Sample Preparation and TEM Analysis

Autoren

E. Zschech
Hans-Jürgen Engelmann
Prof. Dr.-Ing. Holger Saage
holger.saage@haw-landshut.de
Quentin deRobillard
H. Stegmann

Medien

Practical Metallography

Veröffentlichungsjahr

2001

Band

2001/38

Heft

8

Veröffentlichungsart

Zeitschriften-/Journalbeitrag (peer-reviewed)

DOI

https://doi.org/10.1515/pm-2001-380803

Zitierung

Zschech, E.; Engelmann, Hans-Jürgen; Saage, Holger; deRobillard, Quentin; Stegmann, H. (2001): Characterization of Layer Stacks in Microelectronic Products: Challenges to Sample Preparation and TEM Analysis. Practical Metallography 2001/38 (8). DOI: 10.1515/pm-2001-380803

Peer Reviewed

Ja

Leichtbau

Characterization of Layer Stacks in Microelectronic Products: Challenges to Sample Preparation and TEM Analysis